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PD- 91888
IRL5602S
HEXFET(R) Power MOSFET
l l l l l l
Advanced Process Technology Dynamic dv/dt Rating 175C Operating Temperature P-Channel Fast Switching Fully Avalanche Rated
D
VDSS = -20V
G S
RDS(on) = 0.042W ID = -24A
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application.
D 2 Pak
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ -4.5V Continuous Drain Current, VGS @ -4.5V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Max.
-24 -17 -96 75 0.5 8.0 290 -12 7.5 -0.81 -55 to + 175 300 (1.6mm from case )
Units
A W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RqJC RqJA Junction-to-Case Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
--- ---
Max.
2.0 40
Units
C/W
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1
5/11/99
IRL5602S
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
DV(BR)DSS/DTJ
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LS Ciss Coss Crss
Min. -20 --- --- --- --- -0.7 12 --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. Max. Units Conditions --- --- V VGS = 0V, ID = -250A -0.013 --- V/C Reference to 25C, ID = -1mA --- 0.042 VGS = -4.5V, ID = -12A --- 0.062 W VGS = -2.7V, ID = -10A --- 0.075 VGS = -2.5V, ID = -10A --- -1.0 V VDS = VGS, ID = -250A --- --- S VDS = -15V, ID = -12A --- -25 VDS = -20V, VGS = 0V A --- -250 VDS = -16V, VGS = 0V, TJ = 150C --- 500 VGS = -8.0V nA --- -500 VGS = 8.0V --- 44 ID = -12A --- 8.7 nC VDS = -16V --- 19 VGS = -4.5V, See Fig. 6 and 13 9.7 --- VDD = -10 V 73 --- ID = -12A ns 53 --- RG = 6.0W, VGS = 4.5V 84 --- RD = 0.8W, See Fig. 10 Between lead, 7.5 --- nH and center of die contact 1460 --- VGS = 0V 790 --- pF VDS = -15V 370 --- = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- -24 showing the A G integral reverse -96 --- --- p-n junction diode. S --- --- -1.4 V TJ = 25C, IS = -12A, VGS = 0V --- 58 88 ns TJ = 25C, IF = -12A --- 54 81 nC di/dt = -100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
ISD -12A, di/dt 120A/s, VDD V(BR)DSS,
TJ 175C
Starting TJ = 25C, L = 3.0mH
RG = 25W, IAS = -14A. (See Figure 12)
Pulse width 300s; duty cycle 2%.
** When mounted on FR-4 board using minimum recommended footprint. For recommended footprint and soldering techniques refer to application note #AN-994.
2
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IRL5602S
100
VGS -15V -12V -10V -7.0V -5.0V -4.5V -2.7V BOTTOM -2.0V TOP
100
-I D , Drain-to-Source Current (A)
10
-I D , Drain-to-Source Current (A)
VGS -15V -12V -10V -7.0V -5.0V -4.5V -2.7V BOTTOM -2.0V TOP
10
-2.0V
-2.0V
1 0.1
20s PULSE WIDTH TJ = 25 C
1 10 100
1 0.1
20s PULSE WIDTH TJ = 175 C
1 10 100
-VDS , Drain-to-Source Voltage (V)
-VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
3.5
-I D , Drain-to-Source Current (A)
TJ = 25 C TJ = 175 C
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = -24A
3.0 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 0
10
1 2.0
V DS = -15V 20s PULSE WIDTH 3.0 4.0 5.0 6.0
VGS = -4.5V
20 40 60 80 100 120 140 160 180
-VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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3
IRL5602S
2800 2400
-VGS , Gate-to-Source Voltage (V)
VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd
15
ID = -12A VDS =-16V VDS =-10V
12
C, Capacitance (pF)
2000
Ciss
1600 1200 800
9
Coss
6
Crss
400 0
3
1
10
100
0 0 10 20 30
FOR TEST CIRCUIT SEE FIGURE 13
40 50 60 70
-VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
1000
-ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
10
-ID , Drain Current (A) I
100 100us
TJ = 175 C
TJ = 25 C
1
1ms 10 10ms
0.1 0.0
V GS = 0 V
0.4 0.8 1.2 1.6
1 1
TC = 25 C TJ = 175 C Single Pulse
10 100
-VSD ,Source-to-Drain Voltage (V)
-VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRL5602S
25
VDS
20
RD
VGS RG
-ID , Drain Current (A)
D.U.T.
+
15
-4.5V
10
Pulse Width 1 s Duty Factor 0.1 %
5
td(on) tr t d(off) tf
VGS
0 25 50 75 100 125 150 175
10%
TC , Case Temperature ( C)
90% VDS
Fig 9. Maximum Drain Current Vs. Case Temperature
10
Thermal Response (Z thJC )
1 D = 0.50 0.20 0.10 0.05 0.1 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1
0.01 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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-
VDD
5
IRL5602S
VDS
EAS , Single Pulse Avalanche Energy (mJ)
L
1000
RG
D.U.T
IAS
VDD A DRIVER
800
ID -5.9A -10A BOTTOM -14A TOP
-20V
tp
0.01
600
400
15V
Fig 12a. Unclamped Inductive Test Circuit
200
0 25 50 75 100 125 150 175
I AS
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
tp V(BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
VG
VGS
-3mA
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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+
QGS
QGD
D.U.T.
-
-4.5V
VDS
IRL5602S
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG VGS * dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test
+ VDD
*
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive P.W. Period D=
P.W. Period
[VGS=10V ] ***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
[VDD]
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
[ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For P-Channel HEXFETS
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7
TO-263AB Package Details
10.54 (.415) 10.29 (.405) -A2 1.40 (.055) MAX. 4.69 (.185) 4.20 (.165) -B1.32 (.052) 1.22 (.048) 6.47 (.255) 6.18 (.243) 15.49 (.610) 14.73 (.580) 5.28 (.208) 4.78 (.188) 1.40 (.055) 1.14 (.045) 5.08 (.200) 1.39 (.055) 1.14 (.045) 2.79 (.110) 2.29 (.090) 2.61 (.103) 2.32 (.091) 8.89 (.350) REF. 10.16 (.400) REF.
IRL5602S
1.78 (.070) 1.27 (.050)
1
3
3X
0.93 (.037) 3X 0.69 (.027) 0.25 (.010) M BAM
0.55 (.022) 0.46 (.018)
MINIMUM RECOMMENDED FOOTPRINT 11.43 (.450)
NOTES: 1 DIMENSIONS AFTER SOLDER DIP. 2 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 CONTROLLING DIMENSION : INCH. 4 HEATSINK & LEAD DIMENSIONS DO NOT INCLUDE BURRS.
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059)
LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE
8.89 (.350) 17.78 (.700)
3.81 (.150) 2.08 (.082) 2X
0.368 (.0145) 0.342 (.0135)
2.54 (.100) 2X
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
(This is an IRF530S with assembly lot code 9B1M )
INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE
A
Part Marking
FEED DIRECTION
Tape & Reel
13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941)
4
PART NUMBER F530S 9246 9B 1M
DATE CODE (YYWW) YY = YEAR WW = WEEK
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
30.40 (1.197) MAX.
26.40 (1.039) 24.40 (.961) 3
4
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 838 4630 IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936 http://www.irf.com/ Data and specifications subject to change without notice. 5/99
8
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